In microelectronics, continuous shrinking of devices is necessary to improve the performance, which sets challenging requirements for fabrication of integrated circuits (ICs). New materials and manufacturing techniques are required and materials must be grown in the form of very thin blanket films and thin films covering deep trenches and other three dimensional (3D) structures with good conformality. Atomic layer deposition (ALD) has gathered interest in the microelectronic industry from the unique characteristics that the method offers: ultra-thin films can be deposited on large substrates with excellent conformality and with control of thickness and composition at the nanometer level. ALD has high potential for use in microelectronics for high-k film growth for complementary metal oxide semiconductor (CMOS) devices and dynamic random access memory (DRAM) capacitors as well as for ferroelectrics, barrier materials, and conductors such as metal gates.
High-k dielectrics have been extensively studied due to the fact that SiO2, which is traditionally used as a gate oxide in metal-oxide semiconductor field effect transistors (MOSFETs), can no longer function as an effective gate insulator as higher capacitance density with decreased gate oxide thickness is required for near-future device generations. Silicon oxynitride, SiOxNy, has been used to extend the use of silicon oxide-based gate dielectrics but a long term alternative solution is required. Many high-k dielectric materials under evaluation suffer from various problems, including film crystallization during anneals, growth of interfacial layers during deposition and further processing, large densities of interface traps, reduced channel mobility, reaction with poly-silicon gates, and Fermi level pinning with metal gates. Other problems encountered with many high-k dielectric materials include dielectric constants that are too low compared to desired values for advanced semiconductor devices. The dielectric constant of a film stack may be further reduced by the presence of an interfacial layer between the high-k dielectric material and the underlying substrate. Accordingly, further developments for forming high-k dielectric materials are needed to solve these and other problems of prior art high-k dielectric materials.